Today's integrated circuits include a vast number of devices. Smaller devices and shrinking ground rules are the key to enhance performance and to reduce cost. As FET (Field-Effect-Transistor) devices are being scaled down, the technology becomes more complex, and changes in device structures and new fabrication methods are needed to maintain the expected performance enhancements alongside shrinking dimensions. The mainstay material of microelectronics is silicon (Si), or more broadly, Si based materials, or alloys. Such a Si alloy may be, for instance, silicon-germanium (SiGe). The devices in the embodiments of the present disclosure are typically part of the art of Si based material device technology.
There is great difficulty in maintaining performance improvements in FET devices of deeply submicron generations. Therefore, methods for improving performance without scaling down have become of interest. Such methods include the use of metal gates and the use of so called high-k dielectric gate insulators. Since there are many possible applications for electronic circuits, the need may arise for combining, or mixing, metal gate FET devices with the more traditional polysilicon gate devices. Such combinations have their own difficulties due to the differing processing requirements of the two differing type of gates. Better methods are needed for the fabrication of CMOS circuits containing both metal gate and polysilicon gate devices. Such methods may have significant commercial value, as well as, may enable better, tighter structures.